Vlsi HEADSPEAKER - 5.1 Manuel d'utilisateur

VS1003VS1003 - MP3/WMA AUDIO CODECFeatures• Decodes MPEG 1 & 2 audio layer III(CBR +VBR +ABR); WMA 4.0/4.1/7/8/9all profiles (5-384kbit/s); WAV (PC

VS10034 CHARACTERISTICS & SPECIFICATIONS4.7 Typical characteristics4.7.1 Line input ADC 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1dBinput vol

VS10034 CHARACTERISTICS & SPECIFICATIONS4.7.3 RIGHT and LEFT outputs 0 20 40 60 80 100 0.001 0.01 0.1 1dBoutput voltage (rms)SNR 30R LOADSNR AW

VS10035 PACKAGES AND PIN DESCRIPTIONS5 Packages and Pin Descriptions5.1 PackagesBoth LPQFP-48 and BGA-49 are lead (Pb) free and also RoHS compliant pa

VS10035 PACKAGES AND PIN DESCRIPTIONS5.2 LQFP-48 and BGA-49 Pin DescriptionsPin Name LQFP-48PinBGA49BallPinTypeFunctionMICP 1 C3 AI Positive different

VS10035 PACKAGES AND PIN DESCRIPTIONSPin types:Type DescriptionDI Digital input, CMOS Input PadDO Digital output, CMOS Input PadDIO Digital input/outp

VS10036 CONNECTION DIAGRAM, LQFP-486 Connection Diagram, LQFP-48Figure 7: Typical Connection Diagram Using LQFP-48.The common buffer GBUF can be used

VS10037 SPI BUSES7 SPI Buses7.1 GeneralThe SPI Bus - that was originally used in some Motorola devices - has been used for bothVS1003’s Serial Data In

VS10037 SPI BUSES7.3 Data Request Pin DREQThe DREQ pin/signal is used to signal if VS1003’s FIFO is capable of receiving data. If DREQis high, VS1003

VS10037 SPI BUSES7.4.3 SDI in VS1001 Compatibility ModeBSYNCSDATADCLKD7 D6 D5 D4 D3 D2 D1 D0Figure 8: BSYNC Signal - one byte transfer.When VS1003 is

VS10037 SPI BUSES7.5.2 SCI Read0 1 2 3 4 5 6 7 8 9 10 11 12 13 30 3114 15 16 170 0 0 0 0 0 1 1 0 0 0 03 2 1 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 015 14 1 0X

VS1003CONTENTSContentsVS1003 1Table of Contents 2List of Figures 51 Licenses 62 Disclaimer 63 Definitions 64 Characteristics & Specifications 74.1 A

VS10037 SPI BUSESAfter the word has been shifted in and the last clock has been sent, XCS should be pulled highto end the WRITE sequence.After the las

VS10037 SPI BUSES7.7 SPI Examples with SM_SDINEW and SM_SDISHARED set7.7.1 Two SCI Writes01 2 3 30 311 0 1 00 0 0 0 0 0X XXCSSCKSI232 33 61 62 63SCI W

VS10037 SPI BUSES7.7.3 SCI Operation in Middle of Two SDI Bytes01XCSSCKSI77 6 5 10 00 7 6 5 1 0SDI ByteSCI OperationSDI Byte8 9 39 40 41 46 47XDREQ hi

VS10038 FUNCTIONAL DESCRIPTION8 Functional Description8.1 Main FeaturesVS1003 is based on a proprietary digital signal processor, VS_DSP. It contains

VS10038 FUNCTIONAL DESCRIPTION8.2.2 Supported WMA FormatsWindows Media Audio codec versions 2, 7, 8, and 9 are supported. All WMA profiles (L1, L2,and

VS10038 FUNCTIONAL DESCRIPTION8.2.3 Supported RIFF WAV FormatsThe most common RIFF WAV subformats are supported.Format Name Supported Comments0x01 PCM

VS10038 FUNCTIONAL DESCRIPTION8.2.4 Supported MIDI FormatsGeneral MIDI and SP-MIDI format 0 files are played. Format 1 and 2 files must be converted tof

VS10038 FUNCTIONAL DESCRIPTION8.3 Data Flow of VS1003VolumecontrolAudioFIFOS.rate.conv.and DACRBitstreamFIFOSDILSCI_VOLSM_ADPCM=02048 stereo samples

VS10038 FUNCTIONAL DESCRIPTION8.5 Serial Control Interface (SCI)The serial control interface is compatible with the SPI bus specification. Data transfe

VS10038 FUNCTIONAL DESCRIPTION8.6.1 SCI_MODE (RW)SCI_MODE is used to control the operation of VS1003 and defaults to 0x0800 (SM_SDINEWset).Bit Name Fu

VS1003CONTENTS7.7.2 Two SDI Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217.7.3 SCI Operation in Middle of Two SDI Bytes . . .

VS10038 FUNCTIONAL DESCRIPTIONSM_STREAM activates VS1003’s stream mode. In this mode, data should be sent with aseven intervals as possible (and prefe

VS10038 FUNCTIONAL DESCRIPTION8.6.2 SCI_STATUS (RW)SCI_STATUS contains information on the current status of VS1003 and lets the user shutdownthe chip

VS10038 FUNCTIONAL DESCRIPTION8.6.4 SCI_CLOCKF (RW)The operation of SCI_CLOCKF is different in VS1003 than in VS1001, VS1011, and VS1002.SCI_CLOCKF bi

VS10038 FUNCTIONAL DESCRIPTION8.6.5 SCI_DECODE_TIME (RW)When decoding correct data, current decoded time is shown in this register in full seconds.The

VS10038 FUNCTIONAL DESCRIPTION8.6.9 SCI_HDAT0 and SCI_HDAT1 (R)For WAV files, SCI_HDAT0 and SCI_HDAT1 read as 0x7761, and 0x7665, respectively.For WMA

VS10038 FUNCTIONAL DESCRIPTIONWhen read, SCI_HDAT0 and SCI_HDAT1 contain header information that is extracted fromMP3 stream currently being decoded.

VS10038 FUNCTIONAL DESCRIPTION8.6.11 SCI_VOL (RW)SCI_VOL is a volume control for the player hardware. For each channel, a value in the range of0..254

VS10039 OPERATION9 Operation9.1 ClockingVS1003 operates on a single, nominally 12.288 MHz fundamental frequency master clock. Thisclock can be generat

VS10039 OPERATION9.4 ADPCM RecordingThis chapter explains how to create RIFF/WAV file with IMA ADPCM format. This is a widelysupported ADPCM format and

VS10039 OPERATIONNote: if SCI_HDAT1 ≥ 896, it may be better to wait for the buffer to overflow and clear beforereading samples. That way you may avoid

VS1003CONTENTS10.4 SCI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4510.5 Serial Data Registers . . . . . . .

VS10039 OPERATIONA way to see if you have written the file in the right way is to check bytes 2 and 3 (the first bytecounts as byte 0) of each 256-byte

VS10039 OPERATIONvoid RecordAdpcm1003(void) { /* VS1003b/VS1033c */u_int16 w = 0, idx = 0;... /* Check and locate free space on disk */SetMp3Vol(0x141

VS10039 OPERATION9.5 SPI BootIf GPIO0 is set with a pull-up resistor to 1 at boot time, VS1003 tries to boot from external SPImemory.SPI boot redefines

VS10039 OPERATION9.8 SDI TestsThere are several test modes in VS1003, which allow the user to perform memory tests, SCIbus tests, and several differen

VS10039 OPERATION9.8.2 Pin TestPin test is activated with the 8-byte sequence 0x50 0xED 0x6E 0x54 0 0 0 0. This test is meantfor chip production testi

VS100310 VS1003 REGISTERS10 VS1003 Registers10.1 Who Needs to Read This ChapterUser software is required when a user wishes to add some own functional

VS100310 VS1003 REGISTERS00000000Instruction (32−bit) Y (16−bit)X (16−bit)System Vectors UserInstruction RAMX DATA RAMY DATA RAM0030 0030Y DAT

VS100310 VS1003 REGISTERS10.6 DAC RegistersDAC registers, prefix DAC_Reg Type Reset Abbrev[bits] Description0xC013 rw 0 FCTLL DAC frequency control, 16

VS100310 VS1003 REGISTERS10.8 Interrupt RegistersInterrupt registers, prefix INT_Reg Type Reset Abbrev[bits] Description0xC01A rw 0 ENABLE[7:0] Interru

VS100310 VS1003 REGISTERS10.9 A/D Modulator RegistersInterrupt registers, prefix AD_Reg Type Reset Abbrev[bits] Description0xC01E rw 0 DIV A/D Modulato

VS1003LIST OF FIGURESList of Figures1 Measured ADC performance of the LINEIN pin. . . . . . . . . . . . . . . . . . . . 102 Measured ADC performance o

VS100310 VS1003 REGISTERS10.10 Watchdog v1.0 2002-08-26The watchdog consist of a watchdog counter and some logic. After reset, the watchdog isinactive

VS100310 VS1003 REGISTERS10.11 UART v1.0 2002-04-23RS232 UART implements a serial interface using rs232 standard.StartbitD0D1 D2 D3D4D5D6 D7StopbitFig

VS100310 VS1003 REGISTERS10.11.3 Data UARTx_DATAA read from UARTx_DATA returns the received byte in bits 7:0, bits 15:8 are returned as ’0’. Ifthere i

VS100310 VS1003 REGISTERSExample UART Speeds, fm= 26MHzComm. Speed [bps] UART_DIV_D1 UART_DIV_D24800 85 639600 42 6314400 42 4219200 51 2628800 42 213

VS100310 VS1003 REGISTERS10.12 Timers v1.0 2002-04-23There are two 32-bit timers that can be initialized and enabled independently of each other. Ifen

VS100310 VS1003 REGISTERS10.12.3 Configuration TIMER_ENABLETIMER_ENABLE BitsName Bits DescriptionTIMER_EN_T1 1 Enable timer 1TIMER_EN_T0 0 Enable timer

VS100310 VS1003 REGISTERS10.13 System Vector TagsThe System Vector Tags are tags that may be replaced by the user to take control over severaldecoder

VS100310 VS1003 REGISTERSThe user may, at will, replace the instruction with a jmpi command to gain control over the ADModulator interrupt.10.13.5 TxI

VS100310 VS1003 REGISTERS10.13.9 UserCodec, 0x0Normally contains the following VS_DSP assembly code:jrnopIf the user wants to take control away from t

VS100310 VS1003 REGISTERS10.14.3 DataBytes(), 0x6VS_DSP C prototype:u_int16 DataBytes(void);If the user has taken over the normal operation of the sys

VS10033 DEFINITIONS1 LicensesMPEG Layer-3 audio decoding technology licensed from Fraunhofer IIS and Thomson.VS1003 contains WMA decoding technology f

VS100311 LATEST DOCUMENT VERSION CHANGES11 Latest Document Version ChangesThis chapter describes the latest and most important changes to this documen

VS100312 CONTACT INFORMATION12 Contact InformationVLSI Solution OyEntrance G, 2nd floorHermiankatu 8FI-33720 TampereFINLANDURL: http://www.vlsi.fi/Phone

VS10034 CHARACTERISTICS & SPECIFICATIONS4 Characteristics & Specifications4.1 Absolute Maximum RatingsParameter Symbol Min Max UnitAnalog Posit

VS10034 CHARACTERISTICS & SPECIFICATIONS4.3 Analog CharacteristicsUnless otherwise noted: AVDD=2.85V, CVDD=2.5V, IOVDD=-2.8V, TA=-25..+70◦C,XTALI=

VS10034 CHARACTERISTICS & SPECIFICATIONS4.4 Power ConsumptionTested with an MPEG 1.0 Layer-3 128 kbit/s sample and generated sine. Output at full